Index: newlib/Makefile
===================================================================
--- newlib/Makefile (revision 37)
+++ newlib/Makefile (revision 38)
@@ -17,12 +17,13 @@
main_url = ftp://sources.redhat.com/pub/newlib
url = $(DOWNLOAD_SERVER)/sources/newlib
-versions = 4.2.0.20211231 4.4.0.20231231
+versions = 4.4.0.20231231 4.2.0.20211231
tarballs = $(addsuffix .tar.gz, $(addprefix newlib-, $(versions)))
sha1s = $(addsuffix .sha1sum, $(tarballs))
-patches = $(CURDIR)/patches/newlib-4.2.0.20211231-riscv.patch
+patches = $(CURDIR)/patches/newlib-4.4.0.20231231-riscv.patch
+patches += $(CURDIR)/patches/newlib-4.2.0.20211231-riscv.patch
.NOTPARALLEL: $(patches)
@@ -58,6 +59,7 @@
$(patches): $(sha1s)
@echo -e "\n======= Create Patches =======\n" ; \
+ ( cd create-4.4.0.20231231-riscv-patch ; ./create.patch.sh ) ; \
( cd create-4.2.0.20211231-riscv-patch ; ./create.patch.sh ) ; \
echo -e "\n"
Index: newlib/create-4.4.0.20231231-riscv-patch/create.patch.sh
===================================================================
--- newlib/create-4.4.0.20231231-riscv-patch/create.patch.sh (nonexistent)
+++ newlib/create-4.4.0.20231231-riscv-patch/create.patch.sh (revision 38)
@@ -0,0 +1,15 @@
+#!/bin/bash
+
+VERSION=4.4.0.20231231
+
+tar --files-from=file.list -xzvf ../newlib-$VERSION.tar.gz
+mv newlib-$VERSION newlib-$VERSION-orig
+
+cp -rf ./newlib-$VERSION-new ./newlib-$VERSION
+
+diff --unified -Nr newlib-$VERSION-orig newlib-$VERSION > newlib-$VERSION-riscv.patch
+
+mv newlib-$VERSION-riscv.patch ../patches
+
+rm -rf ./newlib-$VERSION
+rm -rf ./newlib-$VERSION-orig
Property changes on: newlib/create-4.4.0.20231231-riscv-patch/create.patch.sh
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: newlib/create-4.4.0.20231231-riscv-patch/file.list
===================================================================
--- newlib/create-4.4.0.20231231-riscv-patch/file.list (nonexistent)
+++ newlib/create-4.4.0.20231231-riscv-patch/file.list (revision 38)
@@ -0,0 +1,2 @@
+newlib-4.4.0.20231231/newlib/libc/machine/riscv/setjmp.S
+newlib-4.4.0.20231231/newlib/libc/machine/riscv/strcmp.S
Index: newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/setjmp.S
===================================================================
--- newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/setjmp.S (nonexistent)
+++ newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/setjmp.S (revision 38)
@@ -0,0 +1,98 @@
+/* Copyright (c) 2017 SiFive Inc. All rights reserved.
+
+ This copyrighted material is made available to anyone wishing to use,
+ modify, copy, or redistribute it subject to the terms and conditions
+ of the FreeBSD License. This program is distributed in the hope that
+ it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
+ including the implied warranties of MERCHANTABILITY or FITNESS FOR
+ A PARTICULAR PURPOSE. A copy of this license is available at
+ http://www.opensource.org/licenses.
+*/
+
+#include "sys/asm.h"
+
+/* int setjmp (jmp_buf); */
+ .globl setjmp
+ .type setjmp, @function
+setjmp:
+ REG_S ra, 0*SZREG(a0)
+ REG_S s0, 1*SZREG(a0)
+ REG_S s1, 2*SZREG(a0)
+
+#ifndef __riscv_32e
+ REG_S s2, 3*SZREG(a0)
+ REG_S s3, 4*SZREG(a0)
+ REG_S s4, 5*SZREG(a0)
+ REG_S s5, 6*SZREG(a0)
+ REG_S s6, 7*SZREG(a0)
+ REG_S s7, 8*SZREG(a0)
+ REG_S s8, 9*SZREG(a0)
+ REG_S s9, 10*SZREG(a0)
+ REG_S s10,11*SZREG(a0)
+ REG_S s11,12*SZREG(a0)
+ REG_S sp, 13*SZREG(a0)
+#else
+ REG_S sp, 3*SZREG(a0)
+#endif
+
+#ifndef __riscv_float_abi_soft
+ FREG_S fs0, 14*SZREG+ 0*SZFREG(a0)
+ FREG_S fs1, 14*SZREG+ 1*SZFREG(a0)
+ FREG_S fs2, 14*SZREG+ 2*SZFREG(a0)
+ FREG_S fs3, 14*SZREG+ 3*SZFREG(a0)
+ FREG_S fs4, 14*SZREG+ 4*SZFREG(a0)
+ FREG_S fs5, 14*SZREG+ 5*SZFREG(a0)
+ FREG_S fs6, 14*SZREG+ 6*SZFREG(a0)
+ FREG_S fs7, 14*SZREG+ 7*SZFREG(a0)
+ FREG_S fs8, 14*SZREG+ 8*SZFREG(a0)
+ FREG_S fs9, 14*SZREG+ 9*SZFREG(a0)
+ FREG_S fs10,14*SZREG+10*SZFREG(a0)
+ FREG_S fs11,14*SZREG+11*SZFREG(a0)
+#endif
+
+ li a0, 0
+ ret
+ .size setjmp, .-setjmp
+
+/* volatile void longjmp (jmp_buf, int); */
+ .globl longjmp
+ .type longjmp, @function
+longjmp:
+ REG_L ra, 0*SZREG(a0)
+ REG_L s0, 1*SZREG(a0)
+ REG_L s1, 2*SZREG(a0)
+#ifndef __riscv_32e
+ REG_L s2, 3*SZREG(a0)
+ REG_L s3, 4*SZREG(a0)
+ REG_L s4, 5*SZREG(a0)
+ REG_L s5, 6*SZREG(a0)
+ REG_L s6, 7*SZREG(a0)
+ REG_L s7, 8*SZREG(a0)
+ REG_L s8, 9*SZREG(a0)
+ REG_L s9, 10*SZREG(a0)
+ REG_L s10,11*SZREG(a0)
+ REG_L s11,12*SZREG(a0)
+ REG_L sp, 13*SZREG(a0)
+#else
+ REG_L sp, 3*SZREG(a0)
+#endif
+
+#ifndef __riscv_float_abi_soft
+ FREG_L fs0, 14*SZREG+ 0*SZFREG(a0)
+ FREG_L fs1, 14*SZREG+ 1*SZFREG(a0)
+ FREG_L fs2, 14*SZREG+ 2*SZFREG(a0)
+ FREG_L fs3, 14*SZREG+ 3*SZFREG(a0)
+ FREG_L fs4, 14*SZREG+ 4*SZFREG(a0)
+ FREG_L fs5, 14*SZREG+ 5*SZFREG(a0)
+ FREG_L fs6, 14*SZREG+ 6*SZFREG(a0)
+ FREG_L fs7, 14*SZREG+ 7*SZFREG(a0)
+ FREG_L fs8, 14*SZREG+ 8*SZFREG(a0)
+ FREG_L fs9, 14*SZREG+ 9*SZFREG(a0)
+ FREG_L fs10,14*SZREG+10*SZFREG(a0)
+ FREG_L fs11,14*SZREG+11*SZFREG(a0)
+#endif
+
+ seqz a0, a1
+ add a0, a0, a1 # a0 = (a1 == 0) ? 1 : a1
+ ret
+ .size longjmp, .-longjmp
Index: newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/strcmp.S
===================================================================
--- newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/strcmp.S (nonexistent)
+++ newlib/create-4.4.0.20231231-riscv-patch/newlib-4.4.0.20231231-new/newlib/libc/machine/riscv/strcmp.S (revision 38)
@@ -0,0 +1,196 @@
+/* Copyright (c) 2017 SiFive Inc. All rights reserved.
+
+ This copyrighted material is made available to anyone wishing to use,
+ modify, copy, or redistribute it subject to the terms and conditions
+ of the FreeBSD License. This program is distributed in the hope that
+ it will be useful, but WITHOUT ANY WARRANTY expressed or implied,
+ including the implied warranties of MERCHANTABILITY or FITNESS FOR
+ A PARTICULAR PURPOSE. A copy of this license is available at
+ http://www.opensource.org/licenses.
+*/
+
+#include "sys/asm.h"
+
+.text
+.globl strcmp
+.type strcmp, @function
+strcmp:
+#if defined(PREFER_SIZE_OVER_SPEED) || defined(__OPTIMIZE_SIZE__)
+1:
+ lbu a2, 0(a0)
+ lbu a3, 0(a1)
+ add a0, a0, 1
+ add a1, a1, 1
+ bne a2, a3, 2f
+ bnez a2, 1b
+
+2:
+ sub a0, a2, a3
+ ret
+
+.size strcmp, .-strcmp
+#else
+ or a4, a0, a1
+ li t2, -1
+ and a4, a4, SZREG-1
+ bnez a4, .Lmisaligned
+
+#if SZREG == 4
+ li a5, 0x7f7f7f7f
+#else
+ ld a5, mask
+#endif
+
+ .macro check_one_word i n
+ REG_L a2, \i*SZREG(a0)
+ REG_L a3, \i*SZREG(a1)
+
+ and t0, a2, a5
+ or t1, a2, a5
+ add t0, t0, a5
+ or t0, t0, t1
+
+ bne t0, t2, .Lnull\i
+ .if \i+1-\n
+ bne a2, a3, .Lmismatch
+ .else
+ add a0, a0, \n*SZREG
+ add a1, a1, \n*SZREG
+ beq a2, a3, .Lloop
+ # fall through to .Lmismatch
+ .endif
+ .endm
+
+ .macro foundnull i n
+ .ifne \i
+ .Lnull\i:
+ add a0, a0, \i*SZREG
+ add a1, a1, \i*SZREG
+ .ifeq \i-1
+ .Lnull0:
+ .endif
+ bne a2, a3, .Lmisaligned
+ li a0, 0
+ ret
+ .endif
+ .endm
+
+.Lloop:
+ # examine full words at a time, favoring strings of a couple dozen chars
+#if __riscv_xlen == 32
+ check_one_word 0 5
+ check_one_word 1 5
+ check_one_word 2 5
+ check_one_word 3 5
+ check_one_word 4 5
+#else
+ check_one_word 0 3
+ check_one_word 1 3
+ check_one_word 2 3
+#endif
+ # backwards branch to .Lloop contained above
+
+.Lmismatch:
+ # words don't match, but a2 has no null byte.
+
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+
+#if __riscv_xlen == 64
+ sll a4, a2, 48
+ sll a5, a3, 48
+ bne a4, a5, .Lmismatch_upper
+ sll a4, a2, 32
+ sll a5, a3, 32
+ bne a4, a5, .Lmismatch_upper
+#endif
+ sll a4, a2, 16
+ sll a5, a3, 16
+ bne a4, a5, .Lmismatch_upper
+
+ srl a4, a2, 8*SZREG-16
+ srl a5, a3, 8*SZREG-16
+ sub a0, a4, a5
+ and a1, a0, 0xff
+ bnez a1, 1f
+ ret
+
+.Lmismatch_upper:
+ srl a4, a4, 8*SZREG-16
+ srl a5, a5, 8*SZREG-16
+ sub a0, a4, a5
+ and a1, a0, 0xff
+ bnez a1, 1f
+ ret
+
+1:and a4, a4, 0xff
+ and a5, a5, 0xff
+ sub a0, a4, a5
+ ret
+
+#else
+
+#if __riscv_xlen == 64
+ srl a4, a2, 48
+ srl a5, a3, 48
+ bne a4, a5, .Lmismatch_lower
+ srl a4, a2, 32
+ srl a5, a3, 32
+ bne a4, a5, .Lmismatch_lower
+#endif
+ srl a4, a2, 16
+ srl a5, a3, 16
+ bne a4, a5, .Lmismatch_lower
+
+ srl a4, a2, 8
+ srl a5, a3, 8
+ bne a4, a5, 1f
+ and a4, a2, 0xff
+ and a5, a3, 0xff
+1:sub a0, a4, a5
+ ret
+
+.Lmismatch_lower:
+ srl a2, a4, 8
+ srl a3, a5, 8
+ bne a2, a3, 1f
+ and a2, a4, 0xff
+ and a3, a5, 0xff
+1:sub a0, a2, a3
+ ret
+
+#endif
+
+.Lmisaligned:
+ # misaligned
+ lbu a2, 0(a0)
+ lbu a3, 0(a1)
+ add a0, a0, 1
+ add a1, a1, 1
+ bne a2, a3, 1f
+ bnez a2, .Lmisaligned
+
+1:
+ sub a0, a2, a3
+ ret
+
+ # cases in which a null byte was detected
+#if __riscv_xlen == 32
+ foundnull 0 5
+ foundnull 1 5
+ foundnull 2 5
+ foundnull 3 5
+ foundnull 4 5
+#else
+ foundnull 0 3
+ foundnull 1 3
+ foundnull 2 3
+#endif
+.size strcmp, .-strcmp
+
+#if SZREG == 8
+.section .srodata.cst8,"aM",@progbits,8
+.align 3
+mask:
+.dword 0x7f7f7f7f7f7f7f7f
+#endif
+#endif
Radix cross Linux Toolchains
Toolchains for all supported by Radix cross Linux devices
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